Rahul Ramachandran
electrical engineering @ unsw
research student @ csiro
research student @ csiro
Fourth year electrical engineering student at UNSW. This website is a collection of my projects and technical writeups.
Interests: Modern C++, Systems Programming, FPGA Design
Experience
Research Student @ CSIRO
Deploying ML models on FPGAs for high fidelity synthetic traffic generation.
Embedded Systems Engineer @ Redback Racing
Developed firmware for autonomous vehicle steering control.
Resident Assistant @ Colombo House UNSW
Skills
LanguagesC++, SystemVerilog, VHDL, Verilog, C, Python
TechnologiesUnix, Vivado, Vitis, STM32CubeIDE, KiCAD, Altium, MATLAB, Git